Arria V GZ Avalon-ST Interface for PCIe Solutions: User Guide
Visible to Intel only — GUID: nik1410905331585
Ixiasoft
Visible to Intel only — GUID: nik1410905331585
Ixiasoft
2.1.1. Generating the Testbench
- On the Generate menu, select Generate Testbench System. Specify the parameters listed in the following table.
Table 6. Parameters to Specify on the Generation Tab in Qsys Parameter
Value
Testbench System Create testbench Qsys system
Standard, BFMs for standard Qsys interfaces
Create testbench simulation model
Verilog
Allow mixed-language simulation
Turn this option off
Output Directory
Testbench
<working_dir>/pcie_de_gen1_x8_ast128/testbench
-
Click the Generate button at the bottom of the Generation tab to create the testbench.
This testbench assumes that you are running the DMA application that the example design available in the installation directory creates. Otherwise, the testbench tests will probably fail unless your own testbench has equivalent functionality.