Enhanced Configuration (EPC) Devices Datasheet

ID 683253
Date 5/04/2016
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1.3.7. Flash In-System Programming (ISP)

The flash memory inside EPC devices can be programmed in-system using the JTAG interface and the external flash interface. JTAG-based programming is facilitated by the configuration controller in the EPC device. External flash interface programming requires an external processor or FPGA to control the flash.

Note: The EPC device flash memory supports 100,000 erase cycles.