HDMI Intel® Arria 10 FPGA IP Design Example User Guide

ID 683156
Date 11/12/2021
Public

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2.2. Creating RX-Only or TX-Only Designs

For advanced users, you can use the HDMI 2.1 design to create a TX- or RX-only design.
Figure 5. Components Required for RX-Only or TX-Only Design

To use RX- or TX-only components, remove the irrelevant blocks from the design.

Table 4.  RX-Only and TX-Only Design Requirements
User Requirements Preserve Remove Add
HDMI RX only RX Top
  • TX Top
  • RX-TX Link
  • CPU Subsystem
  • Transceiver Arbiter
HDMI TX only
  • TX Top
  • CPU Sub-System
  • RX Top
  • RX-TX Link
  • Transceiver Arbiter
Video Pattern Generator

(custom module or generated from the Video and Image Processing (VIP) Suite)

Besides the RTL changes, you need to also edit the main.c script.

  • For HDMI TX-only designs, decouple the wait for the HDMI RX lock status by removing the following lines and replace with tx_xcvr_reconfig(tx_frl_rate);

    rx_hdmi_lock = READ_PIO(PIO_IN0_BASE, PIO_RX_LOCKED_OFFSET, PIO_RX_LOCKED_WIDTH);

    while (rx_hdmi_lock == 0) {

    if (check_hpd_isr()) { break; }

    // rx_vid_lock = READ_PIO(PIO_IN0_BASE, PIO_VID_LOCKED_OFFSET, PIO_VID_LOCKED_WIDTH);

    rx_hdmi_lock = READ_PIO(PIO_IN0_BASE, PIO_RX_LOCKED_OFFSET, PIO_RX_LOCKED_WIDTH);

    // Reconfig Tx after rx is locked

    if (rx_hdmi_lock == 1) {

    if (READ_PIO(PIO_IN0_BASE, PIO_LOOPBACK_MODE_OFFSET, PIO_LOOPBACK_MODE_WIDTH) == 1) {

    rx_frl_rate = READ_PIO(PIO_IN0_BASE, PIO_RX_FRL_RATE_OFFSET, PIO_RX_FRL_RATE_WIDTH);

    tx_xcvr_reconfig(rx_frl_rate);

    } else {

    tx_xcvr_reconfig(tx_frl_rate);

    } } }

  • For HDMI RX-only designs, keep only the following lines in the main.c script:

    REDRIVER_INIT();

    hdmi_rx_init();

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