HDMI Intel® Arria 10 FPGA IP Design Example User Guide

ID 683156
Date 11/12/2021
Public

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3.9. Hardware Setup

The HDMI Intel® FPGA IP design example is HDMI 2.0b capable and performs a loop-through demonstration for a standard HDMI video stream.
To run the hardware test, connect an HDMI-enabled device—such as a graphics card with HDMI interface—to the Transceiver Native PHY RX block, and the HDMI sink input.
  1. The HDMI sink decodes the port into a standard video stream and sends it to the clock recovery core.
  2. The HDMI RX core decodes the video, auxiliary, and audio data to be looped back in parallel to the HDMI TX core through the DCFIFO.
  3. The HDMI source port of the FMC daughter card transmits the image to a monitor.
Note: If you want to use another Intel FPGA development board, you must change the device assignments and the pin assignments. The transceiver analog setting is tested for the Intel® Arria® 10 FPGA development kit and Bitec HDMI 2.0 daughter card. You may modify the settings for your own board.

On-board Push Button and User LED Functions
Push Button/LED Function
cpu_resetn

Press once to perform system reset.

user_pb[0]

Press once to toggle the HPD signal to the standard HDMI source.

user_pb[1]
  • Press and hold to instruct the TX core to send the DVI encoded signal.
  • Release to send the HDMI encoded signal.
user_pb[2]
  • Press and hold to instruct the TX core to stop sending the InfoFrames from the sideband signals.
  • Release to resume sending the InfoFrames from the sideband signals.
USER_LED[0]
RX HDMI PLL lock status.
  • 0 = Unlocked
  • 1 = Locked
USER_LED[1]
RX transceiver ready status.
  • 0 = Not ready
  • 1 = Ready
USER_LED[2]
RX HDMI core lock status.
  • 0 = At least 1 channel unlocked
  • 1 = All 3 channels locked
USER_LED[3]
RX oversampling status.
  • 0 = Non-oversampled (data rate > 1,000 Mbps in Intel® Arria® 10 device)
  • 1 = Oversampled (data rate < 100 Mbps in Intel® Arria® 10 device)
USER_LED[4]
TX HDMI PLL lock status.
  • 0 = Unlocked
  • 1 = Locked
USER_LED[5]
TX transceiver ready status.
  • 0 = Not ready
  • 1 = Ready
USER_LED[6]
TX transceiver PLL lock status.
  • 0 = Unlocked
  • 1 = Locked
USER_LED[7]
TX oversampling status.
  • 0 = Non-oversampled (data rate > 1,000 Mbps in Intel® Arria® 10 device)
  • 1 = Oversampled (data rate < 1,000 Mbps in Intel® Arria® 10 device)

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