HDMI Intel® Arria 10 FPGA IP Design Example User Guide

ID 683156
Date 11/12/2021
Public

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2.14. Design Limitations

You need to consider some limitations when instantiating the HDMI 2.1 design example.
  • TX is unable to operate in TMDS mode when in non-passthrough mode. To test in TMDS mode, toggle the user_dipsw switch back to passthrough mode.
  • The Nios® II processor must serve the TX link training to completion without any interruption from other processes.

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