1.6. PDN Design Optimization Study
This PDN design optimization study uses the previously determined current estimates with a sub-optimal PCB design in terms of PDN performance. It demonstrates step improvements in the PDN performance at each optimization stage. The goal is to improve the PDN efficiency as observed through an increase in the effective frequency (Feffective) for the VCC supply. It is easier to meet Ztarget with an inefficient PDN, but you should target the highest possible Feffective for your design. The VCCT_GXB and VCCR_GXB supplies have a fixed 70MHz frequency target. Optimizing the PDN results in the total number of PCB mounted decoupling capacitors being reduced. The design study discusses PCB optimization and the importance of minimizing spreading and vertical inductance in the PDN. The importance of increasing the power and ground plane capacitance is also demonstrated. Alternative capacitor technologies and their significant effect on PDN efficiency are then demonstrated resulting in fewer PCB mounted capacitors. Finally, a novel high-frequency de-rating of the VCC supply in the PDN Tool demonstrates a further dramatic reduction in the number of required decoupling capacitors.