AN 750: Using the Altera PDN Tool to Optimize Your Power Delivery Network Design
ID
683155
Date
7/08/2015
Public
1.6.1. Initial Stackup Entry
1.6.2. Using the Correct Number of Power/Ground Via Pairs
1.6.3. Using the Correct Number of Power/Ground Via Pairs and Layer Number
1.6.4. Corrected Number of Power/Ground Via Pairs and Layer Numbers
1.6.5. Moving Supplies to Optimal Layers
1.6.6. Moving Power and Ground Planes Closer Together
1.6.7. Move Decoupling Capacitors to the Top Surface of the PCB
1.6.8. Using X2Y Decoupling Capacitors
1.6.9. Using Ultra–Low ESR Bulk Capacitors
1.6.10. Swapping VCC on Layer 9 with VCC, VCCT_GXB, and VCCR_GXB on Layer 4
1.6.11. Assessing How Much Total Capacitance Might be Required
1.6.12. Using the Core Clock Frequency and Current Ramp Up Period Parameters
1.6.13. Overall Design Study Capacitor Savings
1.6.14. Overall Summary
1.6.15. References
1.3. Estimating the Current Requirements of your FPGA Design
Before designing your PDN, it is important to use accurate current estimates for each FPGA power supply. You should consider worst case scenarios of your design, but do not over-estimate, because it can make the PDN design more challenging.
You can estimate the current requirements of your FPGA design with the PowerPlay Early Power Estimators (EPE) and Quartus PowerPlay Power Analyzer (PPPA). The EPE is a spreadsheet based tool that shows the FPGA design power, based on your design requirement input. The PPPA is a Quartus® software tool that estimates your current requirements, based on the Fit of your Quartus project.
The PowerPlay Early Power Estimators (EPE) and Power Analyzer userguide provides additional information on these tools.
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