F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683140
Date 12/17/2021
Public

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Document Table of Contents

4.1.2. VirtIO

VirtIO Supported Features

  • VirtIO devices are implemented as PCI Express devices.
  • Support 8 PFs and 2K VFs VirtIO capability structure for each EP.
  • Configuration Intercept Interface in the F-Tile IP for PCIe (EP mode only) is provided for VirtIO transport.
  • Five VirtIO device configuration structures are supported:
    • Common configuration
    • Notifications
    • ISR Status
    • Device-specific configuration (optional)
    • PCI configuration access
  • Location of each structure is specificed using a vendor-specific PCI capability located in the PCI configuration space of the device.
  • VirtIO capability structure uses little-endian format.
  • All fields of the VirtIO capability structure are read-only for the driver by default.
  • Support PFs and VFs FLR
  • Supports x16 and x8 cores.
  • MSI is not supported with VirtIO.

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