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1.1. Logic Array Block
1.2. Embedded Memory
1.3. Embedded Multiplier
1.4. Clocking and PLL
1.5. General Purpose I/O
1.6. High-Speed LVDS I/O
1.7. External Memory Interface
1.8. Analog to Digital Converter
1.9. Configuration Schemes
1.10. User Flash Memory
1.11. Power Management
1.12. Document Revision History for Intel® MAX® 10 FPGA Device Architecture
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1.5.2. Intel® MAX® 10 I/O Banks Locations
The I/O banks are located at the periphery of the device.
For more details about the modular I/O banks available in each device package, refer to the relevant device pin-out file.
Figure 16. I/O Banks for 10M02 Devices (Except Single Power Supply U324 Package)
Figure 17. I/O Banks for 10M02 (Single Power Supply U324 Package), 10M04, and 10M08 (Except V81, M153, and U169 Packages) Devices
Figure 18. I/O Banks for 10M08 V81, M153, and U169 Packages Devices
Figure 19. I/O Banks for 10M16, 10M25 , 10M40, and 10M50 Devices