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1.1. Logic Array Block
1.2. Embedded Memory
1.3. Embedded Multiplier
1.4. Clocking and PLL
1.5. General Purpose I/O
1.6. High-Speed LVDS I/O
1.7. External Memory Interface
1.8. Analog to Digital Converter
1.9. Configuration Schemes
1.10. User Flash Memory
1.11. Power Management
1.12. Document Revision History for Intel® MAX® 10 FPGA Device Architecture
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1.8.1. ADC Block Locations
The ADC blocks are located at the top left corner of the Intel® MAX® 10 device periphery.
Figure 27. ADC Block Location in Intel® MAX® 10 04 and 08 Devices
Figure 28. ADC Block Location in Intel® MAX® 10 16 Devices
Figure 29. ADC Block Location in Intel® MAX® 10 25, 40, and 50 DevicesPackage E144 of these devices have only one ADC block.