P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 10/07/2021

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Document Table of Contents VirtIO PCI Configuration Access Data Register (Address: 0x03B)

The PCI configuration data register indicates the data for BAR access.

Table 102.  VirtIO PCI Configuration Access Data Register
Bit Location Description Access Type Default Value
31:0 PCI Configuration Data RWS Undetermined (*)
Note: (*) Software needs to write the correct value to this register.