P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 10/07/2021

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7.2.2. Enabling the P-Tile Debug Toolkit

To enable the P-Tile Debug Toolkit in your design, enable the option Enable Debug Toolkit in the PCIe Configuration, Debug and Extension options tab of the Intel FPGA P-Tile Avalon® -ST IP for PCI Express. This option is available for each port when using port bifurcation modes (for example, x8x8). You must enable this option for all the ports for which you want to use the Debug Toolkit.

You must also enable the option Enable PHY reconfiguration interface for the Debug Toolkit to function as expected.

Note: When you enable the P-Tile Debug Toolkit in the IP, the Hard IP reconfiguration interface and the PHY reconfiguration interface will be used by the Debug Toolkit. Hence, you will not be able to drive logic on these interfaces from the FPGA fabric.