P-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide

ID 683059
Date 10/07/2021

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Document Table of Contents Latency Tolerance Reporting (LTR)

This capability allows the P-Tile Avalon streaming IP, when operating in Endpoint mode, to report the delay that it can tolerate when requesting service from the Host. This information can help software optimize performance when the Endpoint needs a fast response, or optimize system power when a fast response is not necessary.

Table 24.  Latency Tolerance Reporting (LTR) Parameters
Parameter Value Default Value Description
PCIe0 Enable LTR True/False False

Enable or disable LTR capability for PCIe0.

LTR is a new mechanism that enables Endpoints to send information about their latency requirements for memory read/writes and interrupts.