Intel® Agilex™ Variable Precision DSP Blocks User Guide

ID 683037
Date 11/17/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents 18-bit Systolic FIR Mode

In 18-bit systolic FIR mode, the adders are configured as dual 44-bit adders, thereby giving 7 bits of overhead when using an 18 x 19 operation mode, resulting 37-bit result.

Figure 26.  18-Bit Systolic FIR Mode for Intel® Agilex™ Devices