Intel® Agilex™ Variable Precision DSP Blocks User Guide

ID 683037
Date 11/17/2022
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3.2.1.5. FP32 Vector Two Mode

This mode performs single-precision floating-point multiplication for input fp32_mult_a and input fp32_mult_b, and direct the result to chainout. The chainin input from the previous variable DSP Block is then added or subtracted from input fp32_adder_a as the output result.

Table 17.  Equations Applied to FP32 Vector Two Mode
Chainin Parameter Vector Two with Floating-point Addition Vector Two with Floating-point Subtraction
Disable

fp32_result = fp32_adder_a

fp32_chainout = fp32_mult_a * fp32_mult_b

fp32_result = fp32_adder_a

fp32_chainout = fp32_mult_a * fp32_mult_b

Enable

fp32_result = fp32_adder_a + fp32_chainin

fp32_chainout = fp32_mult_a * fp32_mult_b

fp32_result = fp32_adder_a - fp32_chainin

fp32_chainout = fp32_mult_a * fp32_mult_b

The FP32 vector two mode supports the following exception flags:
  • fp32_mult_invalid
  • fp32_mult_inexact
  • fp32_mult_overflow
  • fp32_mult_underflow
  • fp32_adder_invalid
  • fp32_adder_inexact
  • fp32_adder_overflow
  • fp32_adder_underflow
Figure 32. FP32 Vector Two Mode