Intel® Agilex™ Variable Precision DSP Blocks User Guide

ID 683037
Date 11/17/2022
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5.6.3. 18 × 18 Sum of Two Mode Signals

Figure 53. 18 × 18 Sum of Two Mode Signals


Table 61.  Data Input and Output Signals
Signal Name Type Width Description
ax[17:0] Input 18 Input data bus to top multiplier.

This signal is not available when internal coefficient feature is enabled.

ay[18:0] Input 19 Input data bus to top multiplier.

When pre-adder is enabled, these signals are served as input to the top pre-adder.

az[17:0] Input 18

These signal are input to the top pre-adder.

These signals are only available when pre-adder is enabled.

bx[17:0] Input 18 Input data bus to bottom multiplier.
by[18:0] Input 19 Input data bus to bottom multiplier.

When pre-adder is enabled, these signals serve as input signals to the bottom pre-adder.

bz[17:0] Input 18

These signals are input signals to the bottom pre-adder.

These signals are only available when pre-adder is enabled.

resulta[63:0] Output 37 Output data bus from top multiplier.
Table 62.  Clock, Enable, and Clear Signals
Signal Name Type Width Description
clk[0] Input 1 Input clock for all registers.
ena[2:0] Input 3 Clock enable signals for all registers.

These signals are active-High.

clr[1:0] Input 2 These signals can be asynchronous or synchronous clear input signals for all registers. You may select the type of clear input signal using Type of clear signal parameter.

These signals are active-High.

By default, this signal is low.

For more information about clock enable restrictions for input registers, refer to the related information.

Table 63.  Dynamic Control SignalsFor a summary of supported dynamic control features for each operational mode, refer to the related information.
Signal Name Type Width Description
disable_chainout Input 1 Dynamic input signal to enable dynamic chainout feature. You can change the value of this signal during run-time.

You must connect the chainout output bus to the next DSP block in order to use this signal.

  • 0: Send the chainout output to the next DSP block. Default value.
  • 1: Do not send the chainout output to the next DSP block. The chainout output is all zero.
disable_scanin Input 1 Dynamic input signal to enable dynamic scanin feature. You can change the value of this signal during run-time.

This signal is available when you Set Enable 'disable scanin parameter to Yes.

You must set Enable input cascade for 'ay' input parameter to Yes to use this signal.

  • 0: Switch the input of the top multiplier to use scanin input.
  • 1: Switch the input of the top multiplier to use ay input.
accumulate Input 1 Input signal to enable or disable the accumulator feature. You can change the value of this signal during run-time.
  • 0: Generate the current result without accumulating the previous result. Default value.
  • 1: Add the current result to the previous result.
loadconst Input 1 Input signal to enable or disable the load constant feature. You can change the value of this signal during run-time.
  • 0: Disable the load constant feature. Default value.
  • 1: Add a preload constant to the result to perform a biased rounding.
sub Input 1 Dynamic input signal to control the operation of the adder module. You can change the value of this signal during run-time.
  • 0: Add the output of the top multiplier with the output of the bottom multiplier. Default value.
  • 1: Subtract the output of the top multiplier from the output of the bottom multiplier.
negate Input 1 Dynamic input signal to control the operation of the chainout adder module. You can change the value of this signal during run-time.
  • 0: Add the sum of the top and bottom multipliers with the chainin data input bus and accumulate loopback data. Default value.
  • 1: Subtract the sum of the top and bottom multipliers from the chainin data input bus and accumulate loopback data.
Table 64.  Internal Coefficient PortsFor a summary of supported features for each operational mode, refer to the related information.
Signal Name Type Width Description
coefsela[2:0] Input 3 Input selection signals for 8 coefficient values defined by user for the top multiplier. The coefficient values are stored in the internal memory and specified by parameters coef_a_0 to coef_a_7.
  • coefsela[2:0] = 000 refers to coef_a_0
  • coefsela[2:0] = 001 refers to coef_a_1
  • coelsela[2:0] = 010 refers to coef_a_2 and so forth.

These signals are only available when the internal coefficient feature is enabled.

coefselb[2:0] Input 3 Input selection signals for 8 coefficient values defined by user for the bottom multiplier. The coefficient values are stored in the internal memory and specified by parameters coef_b_0 to coef_b_7.
  • coefselb[2:0] = 000 refers to coef_b_0
  • coefselb[2:0] = 001 refers to coef_b_1
  • coelselb[2:0] = 010 refers to coef_b_2 and so forth.

These signals are only available when the internal coefficient feature is enabled.

Table 65.  Input Cascade Signals
Signal Name Type Width Description
scanin[18:0] Input 19 Input data bus for input cascade module.

Connect these signals to the scanout signals from the preceding DSP core.

scanout[18:0] Output 19 Output data bus of the input cascade module.

Connect these signals to the scanin signals of the next DSP core.

Table 66.  Output Cascade Signals
Signal Name Type Width Description
chainin[63:0] Input 64 Input data bus for output cascade module.

Connect these signals to the chainout signals from the preceding DSP core.

chainout[63:0] Output 64 Output data bus of the output cascade module.

Connect these signals to the chainin signals of the next DSP core.