High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP User Guide

ID 773264
Date 12/04/2023
Public
Document Table of Contents
Give Feedback

4.2. Parameterizing the High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP

You can parameterize your HBM2E IP with the HBM2E IP parameter editor.

The parameter editor comprises the following tabs, on which you set the parameters for your IP:

  • General
  • Example Design