High Bandwidth Memory (HBM2E) Interface Intel Agilex® 7 M-Series FPGA IP User Guide

ID 773264
Date 12/04/2023
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4.1. Creating an Intel® Quartus® Prime Pro Edition Project for High Bandwidth Memory (HBM2E) Interface FPGA IP

You can parameterize and generate the High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP using the Intel® Quartus® Prime Pro Edition software.
  1. Before generating the HBM2E IP, you must create a new project:
    1. Launch the Intel® Quartus® Prime Pro Edition software.
    2. Launch the New Project Wizard by clicking File > New Project Wizard.
    3. Type a name for your project in the Directory, Name, Top-Level Entity field.
    4. In the Project Type section, select Empty Project.
    5. In the Add Files section, click Next.
    6. In the Family, Device, and Board Settings section, select Agilex 7 (F-Series/M-Series/I-Series) as the device family.
    7. Under Available Devices, select your Intel Agilex® 7 M-Series device and your desired speed grade.
    8. Click Next and follow the Wizard's prompts to finish creating the project.
  2. In the IP Catalog, open Library > Memory Interfaces and Controllers.
  3. Launch the parameter editor by selecting High Bandwidth Memory (HBM2E) Interface Intel Agilex 7 FPGA IP.
    Figure 7. Selecting High Bandwidth Memory (HBM2E) Interface Intel® FPGA IP in the IP Catalog