External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP User Guide

ID 772538
Date 4/03/2023

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4.3.9. s0_axil_clk for EMIF

Axilite clock interface

Table 47.  Interface: s0_axil_clkInterface type: clock
Port Name Direction Description
s0_axil_clk input Axilite clock