F-Tile 25G Ethernet Intel® FPGA IP Design Example User Guide

ID 750200
Date 11/29/2023
Public
Document Table of Contents
Give Feedback

2.1. Features

  • Supports single Ethernet channel operating at 25G.
  • Generates design example with RS-FEC feature.
  • Provides testbench and simulation script.
  • Instantiates F-Tile Reference and System PLL Clocks Intel® FPGA IP based on IP configuration.