F-Tile 25G Ethernet Intel® FPGA IP Design Example User Guide

ID 750200
Date 10/14/2022

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2.3. Functional Description

The F-tile 25G Ethernet design example consists of MAC+PCS+PMA core variant. The following block diagrams show the design components and the top-level signals of the MAC+PCS+PMA core variant in the F-tile 25G Ethernet design example.

Figure 5. Block Diagram—F-tile 25G Ethernet Design Example (MAC+PCS+PMA Core Variant)