Visible to Intel only — GUID: bhc1410932267363
Ixiasoft
Visible to Intel only — GUID: bhc1410932267363
Ixiasoft
A.3.1. Pause Frame Generation
- RX FIFO fill level hits the rx_section_empty threshold.
- XOFF register write.
- XON register write.
- XOFF I/O pin (xoff_gen) assertion.
- XON I/O pin (xon_gen) assertion.
If the RX FIFO buffer is almost full, the MAC function triggers the pause frame generation to the remote Ethernet device.
If the local Ethernet device needs to generate pause frame via XOFF or XON register write or I/O pin assertion, it is recommended to set the rx_section_empty register to a larger value to avoid non-deterministic result.
The following table summarizes the pause frame generation based on the above events.
Register Write or I/O Pin Assertion (1) | Description | |
---|---|---|
XOFF_GEN | XON_GEN | |
1 | 0 | If the XOFF_GEN bit is set to 1, the XOFF pause frames are continuously generated and sent to the MII/GMII TX interface until the XOFF_GEN bit is cleared. |
0 | 1 | If the XON_GEN bit is set to 1, the XON pause frames are continuously generated and sent to the MII/GMII TX interface until the XON_GEN bit is cleared. |
1 | 1 | This event is not recommended as it produces non-deterministic result. |
Note to Pause Frame Generation :
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