Nios V® Embedded Processor Design Handbook

ID 726952
Date 2/14/2023
Public

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4.5. Nios® V Processor Booting from Configuration QSPI Flash

The Nios® V processor supports the following two boot options using configuration QSPI flash under Active Serial configuration mode:

  • Nios® V processor application executes in-place from configuration QSPI flash.
  • Nios® V processor application is copied from configuration QSPI flash to RAM using boot copier.
Table 15.  Supported Flash Memories with respective Boot Options
Supported Boot Memories Nios V Booting Methods Application Runtime Location Boot Copier
Control block-based devices 3 (with Generic Serial Flash Interface Intel® FPGA IP)

Nios V processor application execute-in-place from configuration QSPI flash

Configuration QSPI flash (XIP) + OCRAM/ External RAM (for writable data sections) alt_load() function
Nios V processor application copied from configuration QSPI flash to RAM using boot copier OCRAM/ External RAM GSFI bootloader
SDM-based devices3 (with Mailbox Client Intel® FPGA IP Nios V processor application copied from configuration QSPI flash to RAM using boot copier OCRAM/ External RAM SDM bootloader
3 Refer to Table Nios® V Processor Device Support for the device list.