1. About the Nios® V Embedded Processor 2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer 3. Nios® V Processor Software System Design 4. Nios® V Processor Configuration and Booting Solutions 5. Nios® V Processor - Using the MicroC/TCP-IP Stack 6. Nios® V Processor Debugging, Verifying, and Simulating 7. Nios® V Processor — Remote System Update 8. Nios® V Embedded Processor Design Handbook Archives 9. Document Revision History for the Nios® V Embedded Processor Design Handbook
4.1. Introduction 4.2. Linking Applications 4.3. Nios® V Processor Booting Methods 4.4. Introduction to Nios® V Processor Booting Methods 4.5. Nios® V Processor Booting from Configuration QSPI Flash 4.6. Nios V Processor Booting from On-Chip Memory (OCRAM) 4.7. Summary of Nios® V Processor Vector Configuration and BSP Settings
6.4.1. Prerequisites 6.4.2. Setting Up and Generating Your Simulation Environment in Platform Designer 6.4.3. Creating Nios V Processor Software 6.4.4. Generating Memory Initialization File 6.4.5. Generating System Simulation Files 6.4.6. Running Simulation in the QuestaSim Simulator Using Command Line
2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer
22.214.171.124. Nios® V Processor Application Copied from Configuration QSPI Flash to RAM Using Boot Copier (GSFI Bootloader)
4.4.3. Nios® V Processor Application Execute-In-Place from OCRAM
In this method, the Nios® V processor reset address is set to the base address of the on-chip memory (OCRAM). The application binary (.hex) file is loaded into the OCRAM when the FPGA is configured, after the hardware design is compiled in the Intel® Quartus® Prime software. Once the Nios® V processor resets, the application begins executing and branches to the entry point.
- Execute-In-Place from OCRAM does not require boot copier because Nios® V processor application is already in place at system reset.
- Intel recommends enabling alt_load() for this booting method so that the embedded software behaves identically when reset without reconfiguring the FPGA device image.
- You must enable the alt_load() function in the BSP Settings to copy the .rwdata section upon system reset. In this method, the initial values for initialized variables are stored separately from the corresponding variables to avoid overwriting on program execution.