1. About the Nios® V Embedded Processor 2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer 3. Nios® V Processor Software System Design 4. Nios® V Processor Configuration and Booting Solutions 5. Nios® V Processor - Using the MicroC/TCP-IP Stack 6. Nios® V Processor Debugging, Verifying, and Simulating 7. Nios® V Processor — Remote System Update 8. Nios® V Embedded Processor Design Handbook Archives 9. Document Revision History for the Nios® V Embedded Processor Design Handbook
4.1. Introduction 4.2. Linking Applications 4.3. Nios® V Processor Booting Methods 4.4. Introduction to Nios® V Processor Booting Methods 4.5. Nios® V Processor Booting from Configuration QSPI Flash 4.6. Nios V Processor Booting from On-Chip Memory (OCRAM) 4.7. Summary of Nios® V Processor Vector Configuration and BSP Settings
6.4.1. Prerequisites 6.4.2. Setting Up and Generating Your Simulation Environment in Platform Designer 6.4.3. Creating Nios V Processor Software 6.4.4. Generating Memory Initialization File 6.4.5. Generating System Simulation Files 6.4.6. Running Simulation in the QuestaSim Simulator Using Command Line
2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer
126.96.36.199. Nios® V Processor Application Copied from Configuration QSPI Flash to RAM Using Boot Copier (GSFI Bootloader)
Note: For Intel® Quartus® Prime Standard Edition software, refer to Intel® Quartus® Prime Software Support to generate the example design.You can download the µC/TCP-IP Example Designs in the Intel® FPGA Store. The example designs are based on the Intel Arria 10 SoC development kit. Using the scripts, the hardware and software design are generated, and programmed as SRAM Object Files (.sof) into the device. Using the memory-initialized .sof file, the Nios® V processor boots the µC/TCP-IP application from the On-Chip Memory after resetting the processor during User Mode.
The featured µC/TCP-IP Example Designs are :
- µC/TCP-IP IPerf Example Design
- This example design incorporated the µC/IPerf, an iPerf 2 server or client developed for the µC/TCP-IP Stack and the µC/OS-II RTOS. iPerf 2 is a benchmarking tool for measuring performance between two systems, and it can be used as a server or a client.
- An iPerf server receives iPerf request sent over a TCP/IP connection from any iPerf clients, and runs the iPerf test according to the provided arguments. Each test reports the bandwidth, loss and other parameters.
Figure 78. µC/TCP-IP IPerf Data Flow Diagram
- µC/TCP-IP Simple Socket Server Example Design
- This example design demonstrates communication with a telnet client on a development host PC. The telnet client offers a convenient way of issuing commands over a TCP/IP socket to the Ethernet-connected µC/TCP-IP running on the development board with a simple TCP/IP socket server example.
- The socket server example receives commands sent over a TCP/IP connection and turns LEDs on and off according to the commands. The example consists of a socket server task that listens for commands on a TCP/IP port and dispatches those commands to a set of LED management tasks.
Figure 79. µC/TCP-IP Simple Socket Server Data Flow Diagram