2. Getting Started with the Avalon-MM Design Example
You can download a design example for the Avalon‑MM Arria® V GZ Hard IP for PCI Express from the <install_dir>/ip/altera/altera_pcie/altera_pcie-<dev>_hip_avmm/example_designs directory. This walkthrough uses a Gen2 x4 Endpoint, ep_g2x4.qsys.
The design examples contain the following components:
- Avalon‑MM Arria® V GZ Hard IP for PCI Express IP core
- On-Chip memory
- DMA controller
- Transceiver Reconfiguration Controller
- Two Avalon-MM pipeline bridges
The design example transfers data between an on‑chip memory buffer located on the Avalon-MM side and a PCI Express memory buffer located on the root complex side. The data transfer uses the DMA component which is programmed by the PCI Express software application running on the Root Complex processor.
The example design also includes the Transceiver Reconfiguration Controller which allows you to dynamically reconfigure transceiver settings. This component is necessary for high performance transceiver designs.
Generating the Example Design
Understanding Simulation Log File Generation
Running a Gate-Level Simulation
Simulating the Single DWord Design
Generating Synthesis Files
Creating a Quartus Prime Project
Compiling the Design
Programming a Device
Understanding Channel Placement Guidelines
Did you find the information on this page useful?