Visible to Intel only — GUID: nik1410564780797
Ixiasoft
Visible to Intel only — GUID: nik1410564780797
Ixiasoft
2.2. Generating the Example Design
- On the Generate menu, select Generate Testbench System. The Generation dialog box appears.
- Under Testbench System, set the following options:
- For Create testbench Qsys system, select Standard, BFMs for standard Qsys interfaces.
- For Create testbench simulation model, select Verilog.
- You can retain the default values for all other parameters.
- Click Generate.
- After Qsys reports Generation Completed, click Close.
- On the File menu, click Save.
The following table lists the testbench and simulation directories Qsys generates.
Directory |
Location |
---|---|
Qsys system |
<project_dir>/ep_g2x4 |
Testbench |
<project_dir>/ep_g2x4/testbench/<cad_vendor> |
Simulation Model |
<project_dir>/ep_g2x4/testbench/ep_g2x4_tb/simulation/ |
The design example simulation includes the following components and software:
- The Qsys system
- A testbench. You can view this testbench in Qsys by opening <project_dir>/ep_g2x4/testbench/ep_g2x4_tb.qsys.
- The ModelSim software
Complete the following steps to run the Qsys testbench:
- In a terminal window, change to the <project_dir>/ep_g2x4/testbench/mentor directory.
- Start the ModelSim® simulator.
- Type the following commands in a terminal window:
- do msim_setup.tcl
- ld_debug
- run 140000 ns
The driver performs the following transactions with status of the transactions displayed in the ModelSim simulation message window:
- Various configuration accesses to the Avalon‑MM Arria® V GZ Hard IP for PCI Express in your system after the link is initialized
- Setup of the Address Translation Table for requests that are coming from the DMA component
- Setup of the DMA controller to read 512 Bytes of data from the Transaction Layer Direct BFM shared memory
- Setup of the DMA controller to write the same data back to the Transaction Layer Direct BFM shared memory
- Data comparison and report of any mismatch
The following example shows the transcript from a successful simulation run.
Transcript from ModelSim Simulation of Gen2 x4 Endpoint
# 464 ns Completed initial configuration of Root Port.
# INFO: 2657 ns EP LTSSM State: DETECT.ACTIVE
# INFO: 3661 ns RP LTSSM State: DETECT.ACTIVE
# INFO: 6049 ns EP LTSSM State: POLLING.ACTIVE
# INFO: 6909 ns RP LTSSM State: POLLING.ACTIVE
# INFO: 9037 ns RP LTSSM State: POLLING.CONFIG
# INFO: 9441 ns EP LTSSM State: POLLING.CONFIG
# INFO: 10657 ns EP LTSSM State:CONFIG.LINKWIDTH.START
# INFO: 10829 ns RP LTSSM State: CONFIG.LINKWIDTH.START
# INFO: 11713 ns EP LTSSM State: CONFIG.LINKWIDTH.ACCEPT
# INFO: 12253 ns RP LTSSM State: CONFIG.LINKWIDTH.ACCEPT
# INFO: 12573 ns RP LTSSM State: CONFIG.LANENUM.WAIT
# INFO: 13505 ns EP LTSSM State: CONFIG.LANENUM.WAIT
# INFO: 13825 ns EP LTSSM State: CONFIG.LANENUM.ACCEPT
# INFO: 13853 ns RP LTSSM State: CONFIG.LANENUM.ACCEPT
# INFO: 14173 ns RP LTSSM State: CONFIG.COMPLETE
# INFO: 14721 ns EP LTSSM State: CONFIG.COMPLETE
# INFO: 16001 ns EP LTSSM State: CONFIG.IDLE
# INFO: 16093 ns RP LTSSM State: CONFIG.IDLE
# INFO: 16285 ns RP LTSSM State: L0
# INFO: 16545 ns EP LTSSM State: L0
# INFO: 19112 ns Configuring Bus 001, Device 001, Function 00
# INFO: 19112 ns EP Read Only Configuration Registers:
# INFO: 19112 ns Vendor ID: 0000
# INFO: 19112 ns Device ID: 0001
# INFO: 19112 ns Revision ID: 01
# INFO: 19112 ns Class Code: 000000
# INFO: 19112 ns Subsystem Vendor ID: 0000
# INFO: 19112 ns Subsystem ID: 0000
# INFO: 19112 ns Interrupt Pin: INTA used
# INFO: 20584 ns PCI MSI Capability Register:
# INFO: 20584 ns 64-Bit Address Capable: Supported
# INFO: 20584 ns Messages Requested: 4
# INFO: 28136 ns EP PCI Express Link Status Register (1041):
# INFO: 28136 ns Negotiated Link Width: x4
# INFO: 28136 ns Slot Clock Config: System Reference Clock Used
# INFO: 29685 ns RP LTSSM State: RECOVERY.RCVRLOCK
# INFO: 30561 ns EP LTSSM State: RECOVERY.RCVRLOCK
# INFO: 31297 ns EP LTSSM State: RECOVERY.RCVRCFG
# INFO: 31381 ns RP LTSSM State: RECOVERY.RCVRCFG
# INFO: 32661 ns RP LTSSM State: RECOVERY.IDLE
# INFO: 32961 ns EP LTSSM State: RECOVERY.IDLE
# INFO: 33153 ns EP LTSSM State: L0
# INFO: 33237 ns RP LTSSM State: L0
# INFO: 34696 ns Current Link Speed: 2.5GT/s INFO: 34696 ns
# INFO: 36168 ns EP PCI Express Link Control Register (0040):
# INFO: 36168 ns Common Clock Config: System Reference Clock Used
# INFO: 37960 ns EP PCI Express Capabilities Register (0002):
# INFO: 37960 ns Capability Version: 2
# INFO: 37960 ns Port Type: Native Endpoint
# INFO: 37960 ns EP PCI Express Device Capabilities Register(00008020):
# INFO: 37960 ns Max Payload Supported: 128 Bytes
# INFO: 37960 ns Extended Tag: Supported
# INFO: 37960 ns Acceptable L0s Latency: Less Than 64 ns
# INFO: 37960 ns Acceptable L1 Latency: Less Than 1 us
# INFO: 37960 ns Attention Button: Not Present
# INFO: 37960 ns Attention Indicator: Not Present
# INFO: 37960 ns Power Indicator: Not Present
# INFO: 37960 ns EP PCI Express Link Capabilities Register (01406041):
# INFO: 37960 ns Maximum Link Width: x4
# INFO: 37960 ns Supported Link Speed: 2.5GT/s
# INFO: 37960 ns L0s Entry: Not Supported
# INFO: 37960 ns L1 Entry: Not Supported
# INFO: 37960 ns L0s Exit Latency: 2 us to 4 us
# INFO: 37960 ns L1 Exit Latency: Less Than 1 us
# INFO: 37960 ns Port Number: 01
# INFO: 37960 ns Surprise Dwn Err Report: Not Supported
# INFO: 37960 ns DLL Link Active Report: Not Supported
# INFO: 37960 ns EP PCI Express Device Capabilities 2 Register (0000001F):
# INFO: 37960 ns Completion Timeout Rnge: ABCD (50us to 64s)
# INFO: 39512 ns EP PCI Express Device Control Register (0110):
# INFO: 39512 ns Error Reporting Enables: 0
# INFO: 39512 ns Relaxed Ordering: Enabled
# INFO: 39512 ns Error Reporting Enables: 0
# INFO: 39512 ns Relaxed Ordering: Enabled
# INFO: 39512 ns Max Payload: 128 Bytes
# INFO: 39512 ns Extended Tag: Enabled
# INFO: 39512 ns Max Read Request: 128 Bytes
# INFO: 39512 ns EP PCI Express Device Status Register (0000):
# INFO: 41016 ns EP PCI Express Virtual Channel Capability:
# INFO: 41016 ns Virtual Channel: 1
# INFO: 41016 ns Low Priority VC: 0
# INFO: 46456 ns BAR Address Assignments:
# INFO: 46456 ns BAR Size Assigned Address Type
# INFO: 46456 ns BAR1:0 4 MBytes 00000001 00000000 Prefetchable
# INFO: 46456 ns BAR2 32 KBytes 00200000 Non-Prefetchable
# INFO: 46456 ns BAR3 Disabled
# INFO: 46456 ns BAR4 Disabled
# INFO: 46456 ns BAR5 Disabled
# INFO: 46456 ns ExpROM Disabled
# INFO: 48408 ns Completed configuration of Endpoint BAR
# INFO: 50008 ns Starting Target Write/Read Test.
# INFO: 50008 ns Target BAR = 0
# INFO: 50008 ns Length = 000512, Start Offset = 000000
# INFO: 54368 ns Target Write and Read compared okay!
# INFO: 54368 ns Starting DMA Read/Write Test.
# INFO: 54368 ns Setup BAR = 2
# INFO: 54368 ns Length = 000512, Start Offset = 000000
# INFO: 60609 ns Interrupt Monitor: Interrupt INTA Asserted
# INFO: 60609 ns Clear Interrupt INTA
# INFO: 62225 ns Interrupt Monitor: Interrupt INTA Deasserted
# INFO: 69361 ns MSI recieved!
# INFO: 69361ns DMA Read and Write compared okay!
# SUCCESS: Simulation stopped due to successful completion! # Break at .ep_g1x4_tb/simulation/submodules//altpcietb_bfm_log.v line 78
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