DisplayPort Intel® Stratix® 10 FPGA IP Design Example User Guide

ID 683887
Date 1/07/2022
Public

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1.5.1. Regenerating ELF File

By default, the ELF file is generated when you generate the dynamic design example. However, in some cases, you need to regenerate the ELF file if you modify the software file or regenerate the dp_core.qsys file. Regenerating the dp_core.qsys file updates the .sopcinfo file, which requires you to regenerate the ELF file.
  1. Go to <project directory>/software and edit the code if necessary.
  2. Go to <project directory>/script and execute the following build script:
    source build_sw.sh
    • On Windows, search and open Nios II Command Shell. In the Nios II Command Shell, go to <project directory>/script and execute source build_sw.sh.
    Note: To execute build script on Windows 10, your system requires Windows Subsystems for Linux (WSL). For more information about WSL installation steps, refer to the Nios II Software Developer Handbook.
    • On Linux, launch the Platform Designer, and open Tools > Nios II Command Shell. In the Nios II Command Shell, go to <project directory>/script and execute source build_sw.sh.
  3. Make sure an .elf file is generated in <project directory>/software/dp_demo.
  4. Download the generated .elf file into the FPGA without recompiling the .sof file by running the following script:
    nios2-download <project directory>/software/dp_demo/*.elf
  5. Push the reset button on the FPGA board for the new software to take effect.

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