2.6. Hardware Setup
- To run the hardware test, connect a DisplayPort-enabled source device to the DisplayPort FMC daughter card sink input.
- The DisplayPort sink decodes the port into a standard video stream and sends it to the clock recovery core.
- The clock recovery core synthesizes the original video pixel clock to be transmitted together with the received video data.
Note: You require the clock recovery feature to produce video without using a frame buffer.
- The clock recovery core then sends the video data to the DisplayPort source and the Transceiver Native PHY TX block.
- Connect the DisplayPort FMC daughter card source port to a monitor to display the image.
This LED indicates that the source is successfully lane-trained.
At this point, the IP core asserts rx0_vid_locked.
|USER_LED_G[2:1]||These LEDs indicate the RX link rate.
These LEDs illuminate design example lane counts.
Did you find the information on this page useful?