3.4.3. Reset Signals
|Signal Name||Clocks Domains||Direction||Description|
|tx_reset||asynchronous||input||TX reset input for TX PMA and TX datapath. Must asserted until tx_reset_ack is asserted.|
|rx_reset||asynchronous||input||RX reset input for RX PMA and RX datapath. Must be kept asserted until rx_reset_ack is asserted.|
|tx_reset_ack||asynchronous||output||TX fully in reset indicator. This signal asserts following tx_reset assertion and stays asserted for as long as tx_reset is asserted. This signal deasserts following tx_reset deassertion and remains deasserted for as long as tx_reset is deasserted.|
|rx_reset_ack||asynchronous||output||RX fully in reset indicator. This signal asserts following rx_reset assertion and stays asserted for as long as rx_reset is asserted. This signal deasserts following rx_reset deassertion and remains deasserted for as long as rx_reset is deasserted.|
|tx_am_gen_start||asynchronous||output||When using FEC, indicates when to start sending alignment markers. This clears once tx_am_gen_2x_ack is asserted.|
|tx_am_gen_2x_ack||asynchronous||input||When using FEC, indicates to the reset sequencer at least 2 alignment markers were sent since tx_am_gen_start is asserted. This signal is deasserted after tx_am_gen_start is deasserted.|
|tx_ready||asynchronous||output||Status port to indicate when TX PMA and TX datapath are reset successfully and ready for data transfer.|
If RX de-skew is disabled:
Status port to indicate when RX PMA and RX datapath are reset successfully and ready for data transfer.
If RX de-skew is enabled:
Status port to indicate when RX PMA and RX datapath are reset successfully, RX de-skew is done, and ready for data transfer.
Note: During F-Tile link initialization, the data pattern sent from the TX has to be scrambled to get rx_ready to assert. If a 0101 pattern or other constant patterns are sent, rx_ready does not assert, and the link does not initialize.