F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 10/02/2023
Public

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Document Table of Contents

1. F-Tile Overview

Updated for:
Intel® Quartus® Prime Design Suite 23.3
IP Version 4.6.0
This user guide describes architecture and implementation details for the Intel Agilex® 7 F-Tile building blocks, physical (PHY) layer IP, PLLs, and clock networks. F-Tile has up to 20 PMAs per tile, each with integrated advanced high-speed analog signal conditioning and clock data recovery circuits for chip-to-chip, chip-to-module, and backplane applications.

F-Tile is a PAM4 and NRZ dual-mode serial interface tile that contains 16 F-Tile general purpose transceiver (FGT) PMAs and four F-Tile high-speed transceiver (FHT) PMAs. F-Tile contains multiple hard IP blocks for use in conjunction with the PMAs to allow efficient implementation of popular and emerging serial protocols. F-Tile connects to the FPGA fabric using the Intel embedded multi-die interconnect bridge (EMIB) technology.

Table 1.  F-Tile Features
Feature Description
Number of available PMAs Up to 20.
  • FHT: up to four per tile.
  • FGT: up to 16 per tile.

Not all FHT PMAs bond out in every tile. Refer to Intel® Agilex™ 7 Device Family Pin Connection Guidelines .

Data rate range FHT:
  • 24-29 Gbps NRZ
  • 48-58 Gbps NRZ and PAM4
  • 96-116 Gbps PAM4
FGT:
  • 1-32 Gbps NRZ
  • 20-58.125 PAM4

Not all FGT PMAs support the same data rates. Refer to PMA Data Rates.

Number of EMIBs 24
PCIe* hard IP modes Up to one Gen4 x16, two Gen4 x8, or four Gen4 x4.
Ethernet hard IP modes with number of supported PMAs for each, where 10GbE-1 is 10GbE mode supporting one PMA

10GbE-1, 25GbE-1, 40GbE-4, 50GbE-2, 50GbE-1, 100GbE-4, 100GbE-2, 100GbE-1, 200GbE-8, 200GbE-4, 200GbE-2, 400GbE-8, and 400GbE-4, with these optional features:

  • auto-negotiation
  • link training
  • IEEE 1588 precision time protocol (PTP)

Includes Ethernet PCS and MAC for all data rates. Not all features are supported for all data rates. Refer to F-Tile Ethernet Intel FPGA Hard IP User Guide.

Forward error correction (FEC) and Reed-Solomon FEC (RS-FEC) modes
  • IEEE 802.3 BASE-R Firecode (CL 74)
  • Ethernet Technology Consortium (ETC) RS(272, 258)
  • IEEE 802.3 RS(528, 514) (CL91)
  • IEEE 802.3 RS(544, 514) (CL 134)

Refer to F-Tile Supported FEC Modes and Compliance Specifications.