P-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683853
Date 3/28/2022
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2.4.2. Write DMA Example

A Write DMA transfers data from the Avalon-MM address space to the PCIe address space (system memory). It uses the Write Data Mover's Avalon® -MM read master to read data from the Avalon® -MM address space and sends it upstream using Memory Write TLPs.

The sequence of steps the example design follows to do a Write DMA is:
  1. Prepare a table of descriptors (padded to 512-bit each) to perform the Write operation and put the table into the system memory.
  2. Using the BAM, send one descriptor from software containing the address of the descriptor table to the DMA Controller, which forwards it to the Read Data Mover.
  3. The Read Data Mover fetches the descriptor table and puts it in a FIFO inside the DMA Controller.
  4. The DMA Controller outputs these descriptors to the Write Data Mover based on the readiness of the Write Data Mover (indicated by an asserted wrdm_desc_ready_o or wrdm_prio_ready_o signal).
  5. The Write Data Mover processes the descriptors by fetching data from the Avalon® -MM memory, and writing it to the appropriate system memory.
  6. The Write Data Mover uses the last descriptor in the descriptor table to indicate the completion of the Write Data Mover’s data processing. This descriptor is an Immediate Write (the data is inside the descriptor itself) to the system memory indicating the Write Data Mover’s operations are done.

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