AN 729: Implementing JESD204B IP Core System Reference Design with Nios II Processor

ID 683844
Date 5/04/2015
Public
Document Table of Contents

1.2. Hardware and Software Requirements

This reference design uses the following hardware and software tools:

  • Arria 10 FPGA development kit
  • ADI AD9680 ADC converter card
  • ADI AD9516 clock module
  • Quartus II software version 15.0
  • Nios II Embedded Design Suite (EDS)

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