Visible to Intel only — GUID: lys1525455865873
Ixiasoft
1. Introduction
2. Necessity of Error Correction
3. FEC Selection
4. FEC in Intel® Stratix® 10 H-Tile Devices
5. FEC in Intel® Stratix® 10 E-Tile Devices
6. FEC Implementation Using the E-Tile Channel Placement Tool
7. FEC in Practical Application
8. Hardware Results
9. Document Revision History for AN 846: Intel® Stratix® 10 Forward Error Correction
Visible to Intel only — GUID: lys1525455865873
Ixiasoft
5.1. Types of RS-FEC
RS-FEC | Parameter Name | NRZ PHY | PAM4 PHY | |
---|---|---|---|---|
FEC encoding | — | RS (528, 514, t=7, m=10) | RS (544, 514, t=15, m=10) | |
Total symbols | n | 528 | 544 | |
Message symbols | k | 514 | 514 | |
Parity symbols | n-k | 14 | 30 | |
Bits per symbol | m | 10 | 10 | |
Correctable symbols | t | 7 | 15 | |
Coding gain | DFE | — | 4.9 dB @ 1E-15 | 5.4 dB @ 1E-15 |
Random | — | 5.3 dB @ 1E-12 | 6.5 dB @ 1E-12 |