AN 846: Intel® Stratix® 10 Forward Error Correction

ID 683805
Date 7/02/2018
Public
Document Table of Contents

5.3. 100GBASE-KP4

The 100GBASE-KP4 specification is defined in Clauses 74 and 91 of IEEE802.3bj.

100GBASE-KP4 is a non-binary code (544, 514, 15, 10). 100GBASE-KP4 features:

  • 514 data symbols per codeword
  • 544 data plus parity symbols per codeword
  • Codeword size = 10 * 544 = 5440 bits
  • Correcting capability up to 15 symbols within a codeword
  • 6 to 6.5 dB gain
  • PAM4 modulation
  • 26.5625 Gbps bit rate
  • BER of 10-12 or better (after FEC correction)

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