1. Introduction 2. Necessity of Error Correction 3. FEC Selection 4. FEC in Intel® Stratix® 10 H-Tile Devices 5. FEC in Intel® Stratix® 10 E-Tile Devices 6. FEC Implementation Using the E-Tile Channel Placement Tool 7. FEC in Practical Application 8. Hardware Results 9. Document Revision History for AN 846: Intel® Stratix® 10 Forward Error Correction
5.6.1. Lane Block Synchronization
The RS-FEC transmit function forms 20-bit streams by concatenating the bits from each of the 20 request primitives in the order they are received.
It then uses the synchronization headers to obtain lock to the 66-bit blocks in each bit stream and outputs 66-bit blocks.