AN 744: Scalable Triple Speed Ethernet Reference Design for Arria 10 Devices

ID 683785
Date 5/13/2016
Public

1.7. Testbench

You can use the provided testbench to verify the reference designs. The testbench loops back Ethernet packet into the designs.

Figure 4. Testbench Block Diagram
Table 3.  Testbench Components
Component Description
Device under test (DUT) The reference design.
Avalon driver Consists of Avalon Streaming (Avalon-ST) master bus functional models (BFMs) to generate and monitor ethernet packets. The driver also connects with the design components through the Avalon Memory-Mapped (Avalon-MM) interface.
Ethernet packet monitors Monitor transmit and receive datapaths, and display the frames in the simulator console.

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