Intel Agilex® 7 Device Configuration via Protocol (CvP) Implementation User Guide

ID 683763
Date 12/04/2023
Public
Document Table of Contents
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1. Overview

Updated for:
Intel® Quartus® Prime Design Suite 23.1

Configuration via Protocol (CvP) is a configuration scheme supported in Arria® V, Cyclone® V, Stratix® V, Intel® Arria® 10, Intel® Stratix® 10, Intel® Cyclone® 10 GX, and Intel Agilex® FPGAs. The CvP configuration scheme creates separate images for the periphery and core logic. You can store the periphery image in a local configuration device and the core image in host memory, reducing system costs and increasing the security for the proprietary core image. CvP configures the Intel® FPGA fabric through the PCI Express* ( PCIe* ) link, and is available for Endpoint variants only.

This document describes the CvP configuration scheme for Intel Agilex® 7 FPGAs.