Intel® Stratix® 10 Configuration via Protocol (CvP) Implementation User Guide

ID 683704
Date 12/19/2022
Document Table of Contents

1.1. Benefits of Using CvP

The CvP configuration scheme has the following advantages:
  • Reduces system costs by reducing the size of the local flash device that stores the configuration data. The smallest EPCQ-L device is large enough for all Intel® Stratix® 10 periphery images.
  • Allows update of the FPGA without reprogramming the flash.
  • Enables dynamic core updates without requiring a system power down. CvP allows you to update the FPGA core fabric through the PCIe* link without a host reboot or FPGA full chip reinitialization.
  • Provides a simpler software model for configuration. A smart host can use the PCIe* protocol and the application topology to initialize and update the FPGA core fabric.
  • Allows quick update of your design for changing application loads.

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