Intel® Stratix® 10 Configuration via Protocol (CvP) Implementation User Guide

ID 683704
Date 11/10/2023
Document Table of Contents

5.3. VSEC Registers for CvP

The Vendor Specific Extended Capability (VSEC) registers occupy byte offsets 0xB80 to 0xBC0 in the PCIe* Configuration Space. The PCIe* host uses these registers to communicate with the FPGA control block. The following table shows the VSEC register map. Subsequent tables provide the fields and descriptions of each register.

Table 4.  VSEC Registers for CvP
Byte Offset Register Name
0xB80 Vendor Specific Capability Header
0xB84 Vendor Specific Header
0xB88 Intel Marker
0xB8C:0xB98 Reserved
0xB9C User Configurable Device/Board ID
0xB9E CvP Status
0xBA0 CvP Mode Control
0xBA4 CvP Data 22
0xBA8 CvP Data
0xBAC CvP Programming Control
0xBB0:0xBC4 Reserved
0xBC8 CvP Credit Register
2 This register is no longer functional in Intel® Stratix® 10 devices.