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Key Advantages of Cyclone® V Devices
Summary of Cyclone® V Features
Cyclone® V Device Variants and Packages
I/O Vertical Migration for Cyclone® V Devices
Adaptive Logic Module
Variable-Precision DSP Block
Embedded Memory Blocks
Clock Networks and PLL Clock Sources
FPGA General Purpose I/O
PCIe* Gen1 and Gen2 Hard IP
External Memory Interface
Low-Power Serial Transceivers
SoC with HPS
Dynamic Reconfiguration
Enhanced Configuration and Configuration via Protocol
Power Management
Document Revision History for Cyclone® V Device Overview
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Types of Embedded Memory
The Cyclone® V devices contain two types of memory blocks:
- 10 Kb M10K blocks—blocks of dedicated memory resources. The M10K blocks are ideal for larger memory arrays while still providing a large number of independent ports.
- 640 bit memory logic array blocks (MLABs)—enhanced memory blocks that are configured from dual-purpose logic array blocks (LABs). The MLABs are ideal for wide and shallow memory arrays. The MLABs are optimized for implementation of shift registers for digital signal processing (DSP) applications, wide shallow FIFO buffers, and filter delay lines. Each MLAB is made up of ten adaptive logic modules (ALMs). In the Cyclone® V devices, you can configure these ALMs as ten 32 x 2 blocks, giving you one 32 x 20 simple dual-port SRAM block per MLAB.
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