Intel® Stratix® 10 GX FPGA Development Kit User Guide

ID 683674
Date 4/02/2020
Public
Document Table of Contents

4.9.1.3. RLDRAM3

The RLDRAM3 x36 (reduced latency DRAM) controller is designed for use in applications requiring high memory throughput, high clock rates and full programmability.

Figure 14. RLDRAM3 Block Diagram

Did you find the information on this page useful?

Characters remaining:

Feedback Message