6.3.1. The Configure Menu 6.3.2. The System Info Tab 6.3.3. The GPIO Tab 6.3.4. The Flash Tab 6.3.5. The XCVR Tab 6.3.6. The PCIe Tab 6.3.7. The FMC Tab 6.3.8. The DDR3 Tab Start Stop Performance Indicators Error Control Number of Addresses to Write and Read 6.3.9. The DDR4 Tab 6.3.10. Power Monitor 6.3.11. Clock Controller
6.3.8. The DDR3 Tab
This tab allows you to read and write DDR3 memory on your board.
Figure 29. The DDR3 Tab
The following sections describe the controls on the DDR3 tab.
Initiates DDR3 memory transaction performance analysis.
Terminates transaction performance analysis.
These controls display current transaction performance analysis information collected since you last clicked Start:
- Write, Read and Total performance bars: Shows the percentage of maximum theoretical data rate that the requested transactions are able to achieve.
- Write (MBps), Read(MBps) and Total(MBps): Show the number of bytes of data analyzed per second.
- Data Bus: 72 bits (8 bits ECC) wide and frequency is 1066 MHz double data rate. 2133 Mbps per pin. Equating to a theoretical maximum bandwidth of 136512 Mbps or 17064 MBps.
This control displays data errors detected during analysis and allows you to insert errors:
- Detected errors: Displays the number of data errors detected in the hardware.
- Inserted errors: Displays the number of errors inserted into the transaction stream.
- Insert: Inserts a one-word error into the transaction stream each time you click the button. Insert Error is only enabled during transaction performance analysis.
- Clear: Resets the Detected errors and Inserted errors counters to zeroes.
Number of Addresses to Write and Read
Determines the number of addresses to use in each iteration of reads and writes.
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