Intel® Stratix® 10 GX FPGA Development Kit User Guide

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ID 683674
Date 4/02/2020
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Development Board Setup 4. Board Components 5. System Power 6. Board Test System A. Additional Information B. Revision History
1. Overview x
1.1. General Development Board Description 1.2. Recommended Operating Conditions 1.3. Handling the Board
2. Getting Started x
2.1. Installing Intel® Quartus® Prime Software 2.2. Development Board Package 2.3. Installing the Intel® FPGA Download Cable II Driver
2.1. Installing Intel® Quartus® Prime Software x
2.1.1. Activating Your License
3. Development Board Setup x
3.1. Applying Power to the Development Board 3.2. Default Switch and Jumper Settings
4. Board Components x
4.1. Board Overview 4.2. MAX V CPLD System Controller 4.3. FPGA Configuration 4.4. Status Elements 4.5. User Input-Output Components 4.6. Components and Interfaces 4.7. Clock Circuits 4.8. Memory 4.9. Daughtercards
4.5. User Input-Output Components x
4.5.1. User-Defined Push Buttons 4.5.2. User-Defined DIP Switches 4.5.3. User-Defined LEDs
4.6. Components and Interfaces x
4.6.1. PCI Express 4.6.2. 10/100/1000 Ethernet PHY 4.6.3. HiLo External Memory Interface 4.6.4. FMC 4.6.5. QSFP 4.6.6. I2C 4.6.7. DisplayPort 4.6.8. SDI Video Input/Output Ports
4.7. Clock Circuits x
4.7.1. On-Board Oscillators 4.7.2. Off-Board Clock I/O
4.8. Memory x
4.8.1. Flash 4.8.2. Programming Flash using Quartus Programmer
4.9. Daughtercards x
4.9.1. External Memory Interface
4.9.1. External Memory Interface x
4.9.1.1. DDR3L 4.9.1.2. DDR4 4.9.1.3. RLDRAM3 4.9.1.4. QDR-IV 4.9.1.5. FMC Loopback Card
5. System Power x
5.1. Power Guidelines 5.2. Power Distribution System 5.3. Power Measurement 5.4. Thermal Limitations and Protection
6. Board Test System x
6.1. Preparing the Board 6.2. Running the Board Test System 6.3. Using the Board Test System 6.4. Smart VID Setting
6.3. Using the Board Test System x
6.3.1. The Configure Menu 6.3.2. The System Info Tab 6.3.3. The GPIO Tab 6.3.4. The Flash Tab 6.3.5. The XCVR Tab 6.3.6. The PCIe Tab 6.3.7. The FMC Tab 6.3.8. The DDR3 Tab 6.3.9. The DDR4 Tab 6.3.10. Power Monitor 6.3.11. Clock Controller
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance and Conformity Statements
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Development Board Setup
4. Board Components
5. System Power
6. Board Test System
A. Additional Information
B. Revision History

4.4. Status Elements

The Intel® Stratix® 10 GX FPGA development board includes status LEDs as listed below.
Table 12.  Board-Specific Status LEDs
Board Reference Schematic Signal Name I/O Standard

D3 on the LED board

 MAX_ERROR 2.5V

D6 on the LED board

 MAX_LOAD 2.5V

D8 on the LED board

 MAX_CONF_DONE 2.5V

D12 on the LED board

 FMCA_TX_LED 1.8V

D11 on the LED board

 FMCA_RX_LED 1.8V

D1 on the LED board

 PGM_LED0 2.5V

D2 on the LED board

 PGM_LED1 2.5V

D5 on the LED board

 PGM_LED2 2.5V

D13 on the LED board

 FMCA_PRSTn 1.8V

D15 on the LED board

 PCIE_LED_X1 1.8V

D17 on the LED board

 PCIE_LED_X4 1.8V

D19 on the LED board

 PCIE_LED_X8 1.8V

D20 on the LED board

 PCIE_LED_X16 1.8V

D22 on the LED board

 PCIE_LED_G2 1.8V

D23 on the LED board

 PCIE_LED_G3 1.8V

D14 on the LED board

 JTAG_RX 1.8V

D16 on the LED board

 JTAG_TX 1.8V

D18 on the LED board

 SC_RX 1.8V

D21 on the LED board

 SC_TX 1.8V

D4 on the LED board

 USER_LED_G0, USER_LED_R0 1.8V

D7 on the LED board

 USER_LED_G1, USER_LED_R1 1.8V

D9 on the LED board

 USER_LED_G2, USER_LED_R2 1.8V
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