Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/20/2022
Public

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6.15.6. AMBA* 4 AXI-Lite Signal Support and Limitations

ACE-Lite is a sub-set of AMBA* 4 AXI that consists of an AMBA* 4 AXI interface with additional signals on the read address and write address channels. ACE-Lite signals indicate transactions meant for cache coherence, cache maintenance, and other functions.
Table 102.  ACE-Lite Interface Signal Roles
Name Width Manager Direction Subordinate Direction Required
arsnoop 4 bits Output Input Yes
ardomain 2 bits Output Input Yes
arbar 2 bits Output Input Yes
awsnoop 3 bits Output Input Yes
awdomain 2 bits Output Input Yes
awbar 2 bits Output Input Yes
awunique 1 bit Output Input Yes
Note:

Platform Designer's ACE-Lite interface does comprise of all the signals specified in the AMBA* 4 AXI specification. The following sections describe the Platform Designer support and limitations for ACE-Lite transactions.