Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/20/2022
Public

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7.10.2.2. Avalon® Multiplexer IP Output Interface

The output interface carries the multiplexed data stream with data from the inputs. The symbol, data, and error widths are the same as the input interfaces.

The width of the channel signal is the same as the input interfaces, with the addition of the bits needed to indicate the origin of the data.

You can configure the following parameters for the output interface:

  • Data Bits Per Symbol—the bits per symbol is related to the width of readdata and writedata signals, which must be a multiple of the bits per symbol.
  • Data Symbols Per Beat—the number of symbols (words) that are transferred per beat (transfer). Valid values are 1 to 32.
  • Include Packet Support—indicates whether packet transfers are supported. Packet support includes the startofpacket, endofpacket, and empty signals.
  • Channel Signal Width (bits)— the number of bits Platform Designer uses for the channel signal for output interfaces. For example, set this parameter to 1 if you have two input interfaces with no channel, or set this parameter to 2 if you have two input interfaces with a channel width of 1 bit. The input channel can have a width between 0-31 bits.
  • Error Signal Width (bits)—The width of the error signal for input and output interfaces. A value of 0 means the error signal is not in use.
Note: If you change only bits per symbol, and do not change the data width, errors are generated.