Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/20/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.1.6.2. AXI Bridge Parameters

In the parameter editor, you can customize the parameters for the AXI bridge according to the requirements of your design.

Figure 213. AXI Bridge Parameter Editor


Table 121.  AXI Bridge Parameters
Parameter Type Range Description
AXI Version string AMBA* 3 AXI or AMBA* 4 AXI Specifies the AXI version and signals that Platform Designer generates for the subordinate and manager interfaces of the bridge.
Data Width integer 8:1024 Controls the width of the data for the manager and subordinate interfaces.
Address Width integer 1-64 bits Controls the width of the address for the manager and subordinate interfaces.
AWUSER Width integer 1-64 bits

Controls the width of the write address channel sideband signals of the manager and subordinate interfaces.

ARUSER Width integer 1-64 bits

Controls the width of the read address channel sideband signals of the manager and subordinate interfaces.

WUSER Width integer 1-64 bits

Controls the width of the write data channel sideband signals of the manager and subordinate interfaces.

RUSER Width integer 1-16 bits

Controls the width of the read data channel sideband signals of the manager and subordinate interfaces.

BUSER Width integer 1-16 bits

Controls the width of the write response channel sideband signals of the manager and subordinate interfaces.