Intel® Quartus® Prime Pro Edition User Guide: Platform Designer

ID 683609
Date 6/20/2022
Public

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6.8. Interconnect Pipelining

You can use pipeline stages within the interconnect to increase a design's fMAX. Insertion of pipeline stages reduces the combinational logic depth, while incurring additional latency and logic use.9

The Limit interconnect pipeline stages to option on the Domains tab allows you to specify the maximum number of fixed location Avalon® pipeline stages that Platform Designer can automatically insert in the command and response path, as Figure 196 illustrates. You can specify between 0 to 4 pipeline stages, where 0 means that the interconnect has a combinational datapath. Choosing 3 or 4 pipeline stages can significantly increase the logic utilization of the system. Limit interconnect pipeline stages to is specific to each Platform Designer system or subsystem.

Note: Enabling Limit interconnect pipeline stages to only allows insertion up to the limit you specify. However, the actual insertion of pipelines depends upon the existence of certain interconnect components. For example, single-agent systems do not have multiplexers; therefore, multiplexer pipelining does not occur. In an extreme case of a single-host to single-agent system, no pipelining occurs, regardless of the value of the Limit interconnect pipeline stages to option.
Figure 196. Pipeline Placement in Arbitration Logic for Command PathThe following example shows the location of up to four potential pipeline stages in the interconnect command path. Platform Designer can potentially place pipeline stages before the input to the demultiplexer, at the output of the demultiplexer, between the arbiter and the multiplexer, and at the output of the multiplexer. The response path has one less potential pipeline location than the command path.

If the Limit interconnect pipeline stages to setting does not provide enough fine control over the placement of pipelines, you can explicitly adjust the number of pipeline stages by clicking Show System with Interconnect on the Domains tab, as Add Pipeline Stages to the Interconnect Schematic describes.

9 Each pipeline stage requires two registers and some control logic to store write data, address, and control signals on the command path, as well as response, data, and control signals on the response path.