1.3. Top Level Interface Signals
The tables list the signals for the TX-only design example.
| Signal | Direction | Width | Description |
|---|---|---|---|
| On-board Oscillator Signal | |||
| refclk1_p | Input |
1 | 100 MHz clock source used as IOPLL reference clock and Avalon-MM management clock |
| User Push Button | |||
| cpu_resetn | Input |
1 | Global reset |
| DisplayPort FMC Daughter Card Pins on FMC Port A | |||
| fmca_gbtclk_m2c_p | Input |
1 |
135 MHz dedicated transceiver reference clock from FMC port A |
| fmca_dp_c2m_p | Output |
N |
DisplayPort TX serial data
Note: N = TX maximum lane count
|
| fmca_la_rx_n_9 | Input |
1 |
DisplayPort TX HPD
|
| fmca_la_tx_p_12 | Input |
1 | DisplayPort TX Aux In |
| fmca_la_rx_p_10 | Output |
1 | DisplayPort TX Aux Out |
| fmca_la_rx_n_10 | Output |
1 | DisplayPort TX Aux OE |
| fmca_la_tx_n_12 | Output |
1 | FMC card TX CAD |