CPRI Intel® FPGA IP User Guide

ID 683595
Date 5/19/2023
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3.15.2.2. Specifying the Position in the Control Word

You can access 32 bits in a single register access. Depending on the CPRI line bit rate, a control word may have multiple 32-bit sections. Therefore, in addition to specifying the control word location in the CPRI frame, you must also specify a 32-bit aligned position in the control word.

Table 38.  Control Word Byte Positions in RX_CTRL and TX_CTRL RegistersIn this table, each control word nibble is indicated with 0xF. The presence of 0xF or 0x0 indicates whether the nibble within the register is populated with a valid control word nibble.
CPRI Bit Rate (Gbps) Register Access Sequence Number ({rx,tx}_ctrl_seq)
0

(first access)

1

(2nd access)

2

(3rd access)

3

4th access)

4

(5th access)

5

(6th access)

6

(7th access)

7

(8th access)

8

(9th access)

9

(10th access)

10

(11th access)

11

(12th access)

0.6144 FF000000 0 0 0 0 0 0 0 0 0 0 0
1.2288 FFFF0000 0 0 0 0 0 0 0 0 0 0 0
2.4576 FFFFFFFF 0 0 0 0 0 0 0 0 0 0 0
3.072 FFFFFFFF FF000000 0 0 0 0 0 0 0 0 0 0
4.9152 FFFFFFFF FFFFFFFF 0 0 0 0 0 0 0 0 0  
6.144 FFFFFFFF FFFFFFFF FFFF0000 0 0 0 0 0 0 0 0 0
8.11008, 9.8034 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF 0 0 0 0 0 0 0 0
10.1376 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FF000000 0 0 0 0 0 0 0
12.16512 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF 0 0 0 0 0 0
24.33024 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF
However, the table does not clarify which control word byte occupies which position in the register. The following examples indicate the correspondence between register bytes and control word bytes:
  • At the CPRI line bit rate of 0.6144 Gbps, when you access hyperframe control word X, the 8-bit control word from hyperframe position #Z.X.0 is in bits [31:24] of the register.
  • At the CPRI line bit rate of 1.2288 Gbps, the byte from position #Z.X.0.0 is in bits [31:24] of the register and the byte from position #Z.X.0.1 is in bits [23:16] of the register.
  • At the CPRI line bit rate of 3.072 Gbps, you must access the register twice to retrieve or write the full control word. In the first access operation, you access the 32 bits of the control word in positions #Z.X.0.0 (in register bits [31:24]), #Z.X.0.1 (in register bits [23:16]), #Z.X.0.2 (in register bits [15:8]), and #Z.X.0.3 (in register bits [7:0]). In the second access operation, you access the eight bits of the control word in position #Z.X.0.4 in bits [31:24] of the register.